D4 The AArch64 Virtual Memory System Architecture
This chapter provides a system level view of the AArch64 Virtual Memory System Architecture (VMSA), the memory system architecture of an ARMv8 implementation that is executing in AArch64 state. It contains the following sections:
- D4.1 About the Virtual Memory System Architecture (VMSA)
- D4.2 The VMSAv8-64 address translation system
- D4.3 VMSAv8-64 translation table format descriptors
- D4.4 Access controls and memory region attributes
- D4.5 MMU faults
- D4.6 Translation Lookaside Buffers (TLBs)
- D4.7 TLB maintenance requirements and the TLB maintenance instructions
- D4.8 Caches in a VMSA implementation